IEEE International High-Level Design Validation and Test Workshop
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When : 2016-10-07
Where : Santa Cruz, CA, USA
Submission Deadline : 2016-07-31
Categories : Software Testing , Object Oriented
HLDVT 2016 : IEEE International High-Level Design Validation and Test Workshop
Santa Cruz, CA, USA
Oct 7, 2016 - Oct 8, 2016
Call For Papers
The 18th HLDVT workshop aims to bring together a community of researchers in the areas of design validation and test of hardware, software, cyber-physical systems, biological systems, and biochips. The workshop addresses the integration of multiple functions on-chip/in-system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs.
Topics of Interest
- Simulation-Based Validation
- Formal Verification, and Hybrid Methods
- Design Abstraction, and Behavioral Modeling
- Error Trace Interpretation, and Debugging
- Functional Safety/Safety-critical System Verification
- On-Chip, and Core-Based Testing
- Test Generation for Defects, Design Errors, and Delay Faults
- Hardware/Software, and Mixed-signal System Co-Validation
- Emulation, and Prototyping
- Post-silicon Validation, and Debug.
IMPORTANT DATES
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