Research Sharing System - Share URL
- Title
- Category
- Volume, Issue, Month, Year
- Dynamic Task Scheduling on Multicore Automotive ECUs
- Digital Signal & Image Processing
- 05, 06, December, 2015
- A Low Power CMOS Analog Circuit Design for Acquiring Multichannel EEG Signals
- Digital Signal & Image Processing
- 06, 01, February, 2016
- Dynamic Floating Output Stage for Low Power Buffer Amplifier for LCD Application
- Digital Signal & Image Processing
- 06, 01, February, 2015
- Tracking Cancer Patients Medical History Using Wireless Emerging Technology : Near Field Communication
- Digital Signal & Image Processing
- 06, 01, February, 2015
- Adaptive Supply Voltage Management for Low Power Logic Circuitry Operating at Subthreshold
- Digital Signal & Image Processing
- 06, 02, April, 2015
- Minimally Buffered Router Using Weighted Deflection Routing for Mesh Network on Chip
- Digital Signal & Image Processing
- 06, 03, June, 2015
- SAF Analyses of Analog and Mixed Signal VLSI Circuit : Digital to Analog Converter
- Digital Signal & Image Processing
- 06, 03, June, 2015
- Schottky Tunneling Source Impact Ionization Mosfet (STS-IMOS) with Enhanced Device Performance
- Digital Signal & Image Processing
- 06, 03, June, 2015
- Evaluation of ATM Functioning Using VHDL and FPGA
- Digital Signal & Image Processing
- 06, 03, June, 2015
- Design and Implementation of 10 Bit, 2MS/s Split SAR ADC Using 0.18um CMOS Technology
- Digital Signal & Image Processing
- 06, 03, June, 2015
- Mitigation of Soft Errors on 65NM Combinational Logic Gates via Buffer Gate
- Digital Signal & Image Processing
- 06, 03, June, 2015
- A Novel Architecture of RNS Based Lifting Integer Wavelet Transform (IWT) and Comparative Study with Other Binary and Non-Binary DWT
- Digital Signal & Image Processing
- 06, 04, August, 2015
- ASIC Implementation of I2C Master Bus Controller Firm IP Core
- Digital Signal & Image Processing
- 06, 04, August, 2015
- Architecture of a Novel Configurable Communication Processor for SDR
- Digital Signal & Image Processing
- 06, 04, August, 2015
- Area, Delay and Power Analysis of Built in Self Repair Using 2-D Redundancy
- Digital Signal & Image Processing
- 06, 04, August, 2015
- Design Approach for Fault Recoverable ALU with Improved Fault Tolerance
- Digital Signal & Image Processing
- 06, 04, August, 2015
- Feasible Methodology for Optimization of a Novel Reversible Binary Compressor
- Digital Signal & Image Processing
- 06, 04, August, 2015
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