October 26-28, 2016
Texas
2016 IEEE International Workshop on Signal Processing Systems is a major international forum for discussion of new technology progress and innovations in the design and implementation of digital signal processing systems. It addresses all aspects of architecture and design methods of these systems. Emphasis is on current and future challenges in research and development in both academia and industry.
–Low-power signal processing circuits and applications
–High performance VLSI systems
–VLSI design for 100 Gbps and beyond networking systems
–FPGA and reconfigurable architecture based systems
–System-on-chip and network-on-chip
–VLSI Systems for Wireless Sensor Network and RF Identification Systems
–Programmable digital signal processor architecture and systems
–Application specific instruction-set processor (ASIP) architecture and systems
–SIMD, VLIW and multi-core CPU architecture
–Graphic processing unit (GPU) based massively parallel implementation
–Embedded FPGA architectures
–Optimization of signal processing algorithms
–Compilers and tools for signal processing systems
–Algorithm transformation and algorithm-to-architecture mapping
–Error-Tolerant Techniques for Signal Processing
–Audio, speech and language processing
–Biomedical signal processing and bioinformatics
–Image, video and multimedia signal processing
–Information forensics, security and cryptography
–Machine learning for signal processing
–Sensing and sensor signal processing
–Autonomous energy harvesting-based sensor networks
–Signal processing for non-volatile memory systems
–Latency and power constrained signal processing techniques for high-speed networking
–Wireless communications and networking
–Coding and Compression
–Multiple-Input-Multiple-Output (MIMO) and Communication Systems
–Software Defined Radio
–Vehicular ad hoc networks (VANET)
–Cognitive radio networks
-Internet of Things (IoT)
-Deep learning and reconfigurable/ASIC processors
–Bio-inspired networks
–Context-aware mobile networking
–Wireless body area networks (WBANs)
–Implantable Communications
–Tele-medicine/e-health networks
–Digital Compensation techniques for variations in Silicon process, temperature, aging
–Error Detection and Correction for Volatile and Non Volatile Memories
–Power Reduction and SNR Improvement for On-chip and off-chip interconnects and buses
–Digital Compensation Signal Processing for ADCs, power-amps, MEMS, power Controllers