Sign detection is a critical operation in many computer hardware designs, but it presents unique challenges in residue number systems (RNS) due to the non-positional nature of RNS representations. This paper proposes an efficient algorithm for sign detection in RNS using the moduli set {2n, 22n−1, 22n+1}.The algorithm is derived from the new Chinese Remainder Theorem II (CRT-II) and optimized for efficient hardware implementation.The proposed sign detection circuit employs one carry-save adder (CSA) and a 2n-bit parallel-prefix carry generation unit (CGU) based on the KoggeStone (K-S) architecture. The K-S parallel-prefix structure is adopted for its efficient carry generation and propagation, providing a favorable balance between speed and area while remaining adaptable to diverse operand sizes.Performance evaluations demonstrate substantial improvements in both area and delay compared with existing designs. The proposed sign detection unit achieves an average reduction of 31% in area and 6.1% in delay compared with a state-of-the-art design presented in 2015. Compared with a similar scheme presented in 2016, it achieves average reductions of 23.6% in area and 6.1% in delay. Furthermore, relative to a state-of-the-art design presented in 2019, the proposed architecture achieves average reductions of 26.3% in area and 8% in delay. These results demonstrate the effectiveness of the proposed CRT-II-based approach in reducing hardware cost and propagation delay, establishing its potential for high-performance RNS-based arithmetic and computing applications.