The 2nd International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (REPARA 2016)

July 18-21, 2016

Toulouse, France

Call For Papers

In recent years, traditional processors have not been able to directly translate chip fabrication technology advances intro performance gains. To keep satisfying the demand for computing power, there is a shift from homogeneous machines to heterogeneous architectures combining different kinds of processors (CPUs, GPUs, DSPs, FPGAs, and other accelerators). While this approach has allowed significant performance and energy efficiency benefits, heterogeneous systems are often highly difficult to program with existing tools. To reduce the cost of system development, reengineering techniques emerge as a solution which may help to balance ease-of-development with better performance, better reliability, and lower maintenance costs. 

The RePara2016 workshop is organized in cooperation with the REPARA European Project and it aims to join experts from related disciplines to share recent advances in different areas contributing to better transformation of new and legacy applications to different programming models for diverse computing devices in the context of parallel heterogeneous architectures

Topics

Topics of interest include, but are not limited to: 

- High-level parallel programming models, libraries and languages for heterogeneous platforms 
- Description languages for Heterogeneous Parallel Platforms 
- Parallel patterns for Heterogeneous Platforms 
- Autonomic management of Power/Performance tradeoffs 
- Automated kernel identification and assessment 
- Software refactoring approaches for parallel programming models 
- Transformations from source code to reconfigurable hardware 
- Integration of FPGA accelerators into refactored software 
- Runtimes for software coordination in heterogeneous parallel platforms 
- Performance modeling and prediction in heterogeneous parallel platforms 
- Energy efficiency monitoring and prediction in heterogeneous parallel platforms 
- Software quality assessment in parallel programming models with special attention to maintainability 
- Applying partitioning and mapping for parallel heterogeneous computing architectures 
- Application experiences of refactoring to software in industrial domains 

IMPORTANT DATES

Paper submission: April 15, 2016

                       

Notification of acceptance: May 15, 2016

           

Final manuscripts due: June 01, 2016

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