19th IEEE International High-Level Design Validation and Test Workshop(HLDVT 2017)

October 5-6, 2017, California, USA

Call for Papers :

The 19th HLDVT workshop aims to bring together a community of researchers in the areas of design validation and test of hardware, software, cyber-physical systems, smart-systems, biological systems, and bio-chips. The workshop addresses the integration of multiple functions on-chip/in-system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs in the application fields of: automotive, communication, green computing, healthcare and biological systems.

Topic of Interest :

• Simulation-Based Validation
• Formal Verification, and Hybrid Methods
• Design Abstraction, and Behavioral Modeling
• Error Trace Interpretation, and Debugging
• Functional safety/safety-critical system verification
• On-Chip, and Core-Based Testing
• Test Generation for Defects, Design Errors, and Delay Faults
• Hardware/Software, and Mixed-Signal System Co-Validation
• Emulation, and Prototyping
• Post-silicon Validation, and Debug
• Modeling, Simulation and Verification of Cyber-Physical Systems
• Design and Test for AMS systems
• Variability, Reliability and Dependability management of SoCs.

Important Dates :

• Special sessions proposals due: June 30, 2017
• Abstracts due: July 14, 2017
• Full papers due: July 23, 2017
• Acceptance notification: August 24, 2017
• Final manuscripts due: September 11, 2017

User Name : jerish
Posted 18-01-2017 on 10:21:53 AEDT

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