2027 IEEE International Solid-State Circuits Conference (ISSCC)

February 14-18, 2027

San Francisco Marriott Marquis, San Francisco, California, USA

Scope & Topics

The 2027 IEEE International Solid-State Circuits Conference (ISSCC 2027) is a leading global forum for the presentation of advances in solid-state circuits and systems-on-a-chip. The conference brings together engineers, researchers, and industry professionals working at the cutting edge of integrated circuit design and applications.

The theme of ISSCC 2027 is "Trusted Sustainable Silicon Intelligence from Edge to Cloud." The theme highlights secure, energy-efficient, and trustworthy intelligent IC and SoC innovations across the computing continuum, from ultra-low-power edge devices and sensors to high-performance cloud infrastructure.

Technical Topics of Interest include, but are not limited to:

1. Analog
• Amplifiers, comparators, oscillators, filters, and references
• Nonlinear analog circuits
• Digitally assisted analog circuits
• Sensor interface circuits
• MEMS sensor and actuator interfaces
• Analog front-ends
• Analog circuits in sub-10nm scaled technologies

2. Data Converters
• Nyquist-rate and oversampling A/D and D/A converters
• Embedded and application-specific converters
• Time-to-digital converters
• Sample-and-hold circuits
• Emerging converter architectures
• Converter peripherals including input, reference, and clock drivers
• Calibration, robustness, and practical usability

3. Digital Circuits, Architectures & Systems
• Digital circuits, building blocks, and architectures
• Hardware optimization of complete systems
• Monolithic, chiplet, 2.5D, and 3D systems
• Microprocessor, application, graphics, automotive, ML, AI, and SoC systems
• Accelerators for communications, video, cloud, and datacenter applications
• Reconfigurable, near-threshold, sub-threshold, and approximate computing
• Intra-chip communication and clocking
• Soft-error and variation tolerance
• Power management
• ML and AI systems, including near-memory and in-memory computing

4. Image Sensors & Displays
• Image sensors
• Vision sensors and event-based sensors
• LiDAR, time-of-flight, and depth sensing
• ML and edge computing for imaging
• Display drivers
• Touch sensing
• Haptic and interactive displays
• AR/VR display and sensing technologies

5. Medical
• Medical devices
• Biomedical sensors and SoCs
• Brain-computer and neural interfaces
• Closed-loop biomedical systems
• Wearable, implantable, and ingestible devices
• Ultrasound and medical imaging
• Medical optical microsystems
• Body-area networks
• Wireless power and communication to implants
• ML and edge computing for medical applications

6. Memory
• Static, dynamic, and non-volatile memories
• Stand-alone and embedded memory applications
• Memory and SSD controllers
• High-bandwidth I/O for memories
• Phase-change, magnetic, STT, ferroelectric, and resistive memories
• Low-voltage memory array architectures
• Memory power, reliability, performance, and fault tolerance
• In-memory and near-memory computing for AI applications

7. Power Management
• Power management, delivery, and control
• Switched-mode converter ICs
• Inductive, capacitive, piezoelectric, and hybrid converters
• LDO and linear regulators
• Power delivery for heterogeneous and 2.5D/3D integration
• Gate drivers
• Wide-bandgap GaN and SiC designs
• Isolated and wireless converters
• Envelope supply modulators
• Energy harvesting
• Power management for automotive and harsh environments
• Robotics and LED drivers
• LiDAR power management

8. RF Circuits & Wireless Systems
• RF, mm-Wave, and THz receivers and transmitters
• Frequency synthesizers and RF filters
• Front-end modules
• Multi-element transceivers
• Wireless SoCs and SiPs
• Multi-chiplet wireless systems
• Heterogeneous packaging for wireless standards
• Sensing, radar, and imaging systems
• Satellite communications
• Integrated sensing and communications
• Internet of Things (IoT) applications

9. Security
• Cryptographic accelerators
• Post-quantum cryptography (PQC)
• Fully homomorphic encryption (FHE)
• Zero-knowledge proofs (ZKP), MPC, and OT
• Smart-card security
• Trusted and confidential computing
• Secure processors and memories
• PUFs, TRNGs, secure OTPs, and security primitives
• Side-channel and fault countermeasures
• Security for resource-constrained systems
• Secure analog, mixed-signal, and RF systems
• Secure supply chains
• Security for and with AI
• Secure system design and hardware/software co-design

10. Technology Directions
• Emerging IC, system, and device solutions
• Integrated photonics and silicon electronic-photonic integration
• Quantum devices for metrology, sensing, and computing
• Flexible, stretchable, foldable, printable, and 3D electronics
• Biomedical and chemical sensors
• Wireless power transfer at distance
• ICs for space and extreme environments
• Unconventional platforms for computing and machine learning
• Analog and mixed-signal computing platforms
• AI for automated analog IC design
• Integrated metamaterials and alternative device platforms

11. Wireline
• Receivers, transmitters, and transceivers for wireline systems
• Backplane and copper-cable links
• Chip-to-chip, die-to-die, and on-chip/on-package links
• High-speed memory interfaces
• Optical links and silicon photonics
• High data-rate and bandwidth-density I/O
• Power-efficient and robust equalization techniques
• Automatic gain controls and analog front-ends
• ADC, DAC, and DSP building blocks
• Transimpedance amplifiers and equalizers
• Clock generation and distribution
• Clock recovery, line drivers, and hybrid circuits

Paper Submission

ISSCC 2027 invites researchers and engineers to submit original work covering innovative and significant advances in solid-state circuits and systems-on-a-chip. The submission process requires an informative, quantitative abstract and a draft manuscript including figures for the Digest of Technical Papers.

The abstract must not exceed 500 characters including spaces and should provide factual and quantitative information. The draft manuscript text is limited to five pages and must follow the ISSCC submission requirements. The figures may occupy up to two pages using the official figure template.

ISSCC uses a double-blind review process. Authors must remove names, contact information, affiliations, logos, and other identifying information from the submission. Authors must also use the ISSCC Figure Density Check before submitting their paper.

ISSCC 2027 also introduces voluntary Open Science Badges for Open Design and Open Data. These badges recognize authors who share design artifacts or measurement data associated with their work.

Conference Program

• Technical sessions covering advances in solid-state circuits and systems-on-a-chip.
• Plenary sessions featuring leading experts from industry and research.
• Technical forums covering emerging circuit and system technologies.
• Tutorials providing in-depth technical learning opportunities.
• Advanced-Circuit-Design Forums for experienced circuit designers.
• Short courses focused on specific advanced technical subjects.
• Industry and demonstration sessions.
• Student Research Preview sessions with presentations and posters.
• Exhibition opportunities for companies and research institutions.

Important Dates

Publication & Review

ISSCC papers are submitted for review for inclusion in the Digest of Technical Papers. The conference follows a rigorous double-blind review process. Accepted papers may be presented as regular papers or short papers. Regular papers have a 25-minute presentation format, while short papers have a 15-minute presentation format.

Authors must disclose relevant prior work and follow the conference pre-publication policies. ISSCC does not accept papers whose key innovative ideas and results have already been publicly disclosed.

Conference Venue

The 2027 IEEE International Solid-State Circuits Conference will be held at the San Francisco Marriott Marquis, 780 Mission Street, San Francisco, California 94103, USA.

Conference Website

https://www.isscc.org/